LOGI-MARK1 Guide – Bitstream and Firmware Updates

The LOGI-Mark1 allows for drag and drop reprogramming on FPGA bitstream files and the onboard Cortex M3 LPC1343 firmware files.  This tutorial will walk through the steps required to update the bitstreams for the FPGA or the firmware for the MCU.

Onboard Microcontroller

The LOGI-MARK1 has a built in bootloader that allows for easy updating of new firmware to the LPC1343 M3 Microcontroller.The onboard microcontroller allows for a great deal of flexibility and versatility in how the board operates.The main purpose of having the onboard microcontroller is to allow for easy drag and drop programming of the FPGA, which eliminates the need for an expensive programming adapter.The microcontroller has master control of the some of the FPGA configuration pins, which allows it to directly program the FPGA through a slave serial programming interface.Optionally, peripheral boards including the Beaglebone or Raspberry Pi can gain direct programming access to the FPGA.Additionally the microcontroller adds onboard functionality including 10 bit ADC, peripherals including SPI, UART, I2C and USB.These features allow for the low cost addition of a wide array of complementary features of the onboard FPGA.

Loading FPGA Bitstream

A bitstream programming file for the FPGA is created in theXilinx WebpackISE workspace.The FPGA project is synthesized and implemented and a bitstream file that can be loaded onto the FPGA is created.The General method of loading the bitstream file on to an FPGA is by using a JTAG programming adapter.The LOGI-MARK1 has eliminated the need for the JTAG programming adapter by using the onboard LPC1343 microcontroller as the bitstream loader.The microcontroller shows up as an MSD storage device on the PC that is being used to create the bitstream.The process for loading the bitstream onto the FPGA is as easy as dragging and dropping the renamed bitstream file onto the MSD storage device.The microcontroller then loads the bitstream in the flash memory for storage.The file is then loaded into the FPGA upon power cycles or resets of the microcontroller.Alternatively peripheral boards including the Beaglebone, Raspberry Pi and Arduino can send I2C commands to the microcontroller to reload the bitstream or to take over control of loading a bitstream into the FPGA.

Process for loading a new Bistream

• 1)      Create a new bit file from within Xilinx Webpack ISE or locate an existing bitstream file.
• 2)      Rename the bitstream *.bit file to “config.bit”
• 3)      Using a micro USB cable, plug your host PC into the MARK-1 board's J11 connector. This connector gives you access to the LPC microcontroller on the MARK-1 board. This microcontroller has the capability of configuring the FPGA.
• 4)      You should notice a new filesystem of around 2MB in capacity show up on your host pc (if yo are on Windows, you may have to wait for the appropriate drivers to be installed). It may contain a config.bit file. You may wish to backup this config.bit file to restore the MARK-1 to its factory bit file.Replace the “config.bit” file with the new renamed bitstream that you would like loaded onto the FPGA.
• 5)      Press the Reset button (lower button PB5) to reset the microcontroller.Upon reset the microcontroller will load the new bitstream into the FPGA.LED DC17 will indicate that the bitstream is being loaded.The DONE LED near the FPGA will light upon being successfully loaded.

Bootloader

Custom firmware to add system functionality can be written and updated to the microcontroller by using the LPC1343 built in bootloader.The bootloader is built into the silicon, so there is no need to worry about bricking or losing device by inadvertanlty loading incorrectly linked firmware.Firmware can be easily written using LPCXpresso which is NXP’s free IDE.It is important to note the code support for base system operation including loading the FPGA must be maintained if it is desire to write user customized firmware.

Process to load custom firmware into the LPC:

• 1)      Build custom firmware using LPCXpresso.Build custom application on top of the base application that supports loading the FPGA bitstream.A binary file (*.bin )will be created upon successfully building the project in LPCXpresso. The .bin file will be located in the “Debug” or Release” directories of the LPCXpresso project folder.
• 2)      Rename the *.bin file to “firmware.bin”
• 3)      Plug in a Micro-USB cable into the upper USB port on the LOGI-MARK1, J11. When plugged in the LPC1343 will enumerate as an MSD device.In order to enter bootloader mode press both PB5 and PB6 simultaneously.Let go of PB5 (lower Reset button) while still holding PB6.Note that the silkcreen incorrectly labels the top button as the Reset, the lower button PB5 is the reset button.A rolling motion with the finger while holding both of the buttons down is usually adequate, ie push both buttons with a single finer,roll off the reset while still holding the upper push button down.The upper pushbutton only needs to stay held down for a moment.

• 4) The device will now enumerate as an MSD device in bootloader mode.The Drive will be labeled “DRP DISABLED” .Open the drive once the drive has enumerated and shown up as a drive on your computer.You will see a file named “firmware.bin”.Delete this file and replace it with your newly built firmware file that you have renamed to “firmware.bin”. 

• 5)      Press the reset button after replacing the file.The LPC will now enumerate as an MSD in standard operation and the new firmware will be running.