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claudiug

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claudiug
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  • SATA , SDRAM code

    Hi all,

    although probably very obvious to people familiar with SATA, I'd like to mention that a "normal" SATA cable will connect two logibones as
    D1_P<->D1_P
    D1_N<->D1_N
    D2_P<->D2_P
    D2_N<->D2_N

    This means that clk input pins go together on both logibones. I was planning on fwd a clock to a DCM_SP from one logibone to the other and then fwd back to the original logibone. For this you'd need a "crossover" SATA cable.

    With proper connection (i.e, D2_P/N as input on one logibone and as output on the other) one can get a DCM_SP to lock on the clock from the other logibone. I've used LVDS_33.

    -C
    valentfx
  • Getting started with Xilinx tools

    Hi,

    It never worked for me in Firefox. With the newer IE11, it seems that it has the same behavior as Firefox, it prompts you to download the file (rather than installing the Akamai downloader).

    I would do the following. Start the download in IE. The go to Downloads in IE, copy link location. Then use Cygwin and wget to download the file using the link location. If the download interrupts, you can use 'wget -c' option in the folder (usually Downloads) with the partially downloaded file to continue the download (you may need to relogin on Xilinx website using IE again like you did when you started the download, and copy the new link location - and shuffle a few files around to prevent overwriting). I haven't tried a complete download, but seems to work. The download link is something from xilinx-ax-dl.entitlenow.com/akdlm/..., may be different for you.

    Hope this helps. Your image is the Vivado kit, which only supports 7 series.

    --C
    valentfx