It sounds like there has been a lot of confusion - sorry about that. I have notified them that the current MSRP's are listed in error and they are working on getting it fixed.
I think that the email about no more LOGI boards shipping must have been in regard to teh version "1" which is not technically FCC/CE compliant.
Let me know if you plan on spinning your own board and I can ensure that it works out the first time.
I do have leftover R1.0 stock that I can ship with a nice discount, if you would like to get a board sooner than later. You can email support at valentfx dot com.
I will work on a getting a wiki page up that descrbies the differences from R1->R1.5 (going to be confusing with E14 calling it "2").
* added gpio expander to allow i2c to control the fpga configuration pins rather than using Rpi GPIO
* Added uUSB connector to allow additional power to be supplied to the LPi in the case of high powered applications
* Moved the main Comm SPI pins off the of the fpga config/flash pins so that the FPGA can access and use flash while communicating with the Rpi.
Thanks for the post. E14 and parteners are requiring that we go through full FCC class and CE compliance which is extremely rigorous and difficult to meet, especially with the high speed nature of FPGA technology. E14 agreed to sell the previous batch without compliance but are requiring all new boards to meet this requirement.
We are currently going through the compliance process and in the early stages of MFG the next batch of compliant LOGI boards. Unfortunately it is currenlty CNY in china and the MFG/compliance process is shut down until the end of Feb, which is slowing the process.
If all goes well the remaining boards will be finished late march and will be stocked at E14 and partners.
Where there is currently no stock on E14, I can sell you my remaining stock of LOGI boards of which I have all variants. Please email Support at valentfx.com if you are interested.
Yes, the LOGI Pi has been test to work with the Pi2, though there wer some minor changes to the SPI interfaces driver (only the adress mapping).
Congrats on making to your final year of EE - that is certainly where the fun starts to happen!
Jonathan Piat can give you much better infromation that I as he has a great deal of machine vision experience, but he is out of town until Jan 1.
As was pointed out in the E14 thread, you will really need to create a detailed spec of what you want your system to do and what pieces your want the FPGA to do. For the "human following" algorithm you should look into popular current machine vision algorithms that you might want to use directly or customize for your applcation. Algorithms such as blob (colored region detection) or pattern detection might work well if you had a human wearing a uniquely identifiable shirt color or pattern on the shirt.
The overall system will likely end up being quite complex and where you want to focus you attention on the machine vision using FPGA, I believe it would be quite convenient to offload the projects basic processing tasks to the Pi or the bone wihout needing to make the FPGA project any more complex than you need to.
Jonathan has some good FPGA applications taht you can use as reference to begin to get a feel fow how to image process data in the FPGA and then customizing to fit you own application.
Anyhow, I would start with nice block diagram of the complete system showing which parts will do what (FPGA/MCU) and then decide which platform may suit you best.
We are maxed out with the current footprint. The next step is to go BGA and then have more options to the higher density options as well as built in DDR controllers. The challenge is the cost and complexity associated with BGA. We want to keep it simple and cost minimized to get things moving. But, we have plans to have some more expansive options in the future.