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mjones

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mjones
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  • LOGI-PI-2

    Hi @tmbarton

    It sounds like there has been a lot of confusion - sorry about that.  I have notified them that the current MSRP's are listed  in error and they are working on getting it fixed.  

    I think that the email about no more LOGI boards shipping must have been in regard to teh version "1" which is not technically FCC/CE compliant.

    Let me know if you plan on spinning your own board and I can ensure that it works out the first time.

    I do have leftover R1.0 stock that I can ship with a nice discount, if you would like to get a board sooner than later.  You can email support at valentfx dot com.  

    I will work on a getting a wiki page up that descrbies the differences from R1->R1.5 (going to be confusing with E14 calling it "2").  

    * added gpio expander to allow i2c to control the fpga configuration pins rather than using Rpi GPIO
    * Added uUSB connector to allow additional power to be supplied to the LPi in the case of high powered applications
    * Moved the main Comm SPI pins off the of the fpga config/flash pins so that the FPGA can access and use flash while communicating with the Rpi.  
    * FCC/CE certified

    Cheers.  

    BruceNaylor
  • LOGI-PI-2

    @tmbarton

    The first boards off the latest MFG line have been shipped to e14/farnell.  The stock should be updating soon.  This is a small initial QTY, which will be followed shortly by a large amount of stock.  We hope to not have any further gaps in availability.

    @myriaddev  I will post a formal doc shorty with the described differences.  The changes are very minor and we are calling the board R1.5 in our documentation to reflect this.  Perhaps we will call it "2" to avoid confustion with the E14 nomenclature, but we were unaware of the naming that E14 would use at the time.  

    Brief breakdown of changes:
    - FCC/CE class B approved
    - micro-usb connector to supply any extra power needed that the Pi/bone cannot supply- the connector is PWR ONLY - not usb (did not want to add cost)
    - added i2c gpio expander to handle IO configuration of the FPGA - dedicated Pi pins no longer needed and can be used elsewhere
    - removed Pi SPI pins from the shared FPGA/Flash pins so that the FPGA can freely access flash and communicate with the Pi with no conflict
    - minor change to form factor - added B+/2 mounting holes (kept A/B holes as well)

    You can see the full schematics on the repository under R1.5.  

    Cheers.
    myriaddevtmbarton
  • MyHDL examples for LogiPi

    Hi @woolfel

    We do not have any logi-pi specific examples using myhdl, but it should be straightforward to convert any other examples you find to work with the logi-pi.

    Here is a full workshop on using myhdl.  https://bitbucket.org/cfelton/pyohio

    You will just need to make sure use the logi-pi ucf file when building the generated HDL.  Then use the logi-loader after you have built the example.  

    Hope this helps.
    woolfel