laksonobudi

Comments

• i have found it .. use logi-test from logi-project to learn it. i use it and have done it

  in SDRAM-FIFO-Test Project Comment by laksonobudi December 2018
• i am newbie want to do that, can you explain step by step? i have done with spi transfer register in my logibone. in hw side, am i just replace wishbone_register vhdl module and controll data & address?

  in How to use block/burst mode with wishbone Comment by laksonobudi October 2018
• hai,,, i have same question for you... have you found it?

  in SDRAM-FIFO-Test Project Comment by laksonobudi September 2018