I got the communication over spi working with and eMMC booted beaglebone green (the new one from seeed) and this should apply also to BBB. You need to edit /boot/uEnv.txt and add :
cape_enable=capemgr.enable_partno=BB-SPIDEV1
to enable spi. Then y…
I don't have a BrickPi myslef, and i also don't understand how they could break the i2c ... One possibility is that they change the default speed for I2C to be 1MHz and that our expander would not support that data-rate ... Did i2c-1 appeared in /de…
DI you follow these instructions on the github :
To enable SPI on latest raspbian distro, edit /boot/config.txt (as sudo) and add : dtparam=spi=on
To enable I2C on latest raspbian distro, edit /boot/config.txt (as sudo )and add :
dtparam=i2c_ar…
I don't think its a ucf problem. In a old device tree config we had the SPI configuration all wrong and this would prevent the processor from reading data from the FPGA. I need to check that the kernel we delivered is not based on that device tree c…
If you used logi_loader (unified_loader), the OE enable pin is configured to enable SPI communication. The problem you have is that you loaded the SPI com test in the hardware and that the com test in the software repository uses the GPMC bus to com…
I'am a bit into acoustic these days myself. What are you working on ?
You can work with whatever kernel you want as the problem we have with 4.X is related to GPMC (and you won't want GPMC).The only thing is that i don't know how to activate SPI a…
Hi,
what version of the logibone do you have ? With a eMMC mounted kernel, you need to de-activate the GPMC. The easiest version to do this, is to disable auto-loading of the logi-bone cape by erasing its cape eeprom :
sudo i2cset -y 1 0x24 0x03 0…
Je pensais que la référence à logi-hard était dans le wiki mais visiblement non ...
Il faut donc cloner le repository logi-hard (https://github.com/fpga-logi/logi-hard) et le référencer dans le projet VHDL.
Un example en image avec l'utilisation d…
We don't have a specific example for this. What are you looking to achieve ? The logipi 1.5 only has GPIO_GEN2 shared with the FPGA (in addition of SPI, I2C and Serial). The logipi-1.1 has more pins wired between the FPGA and the raspberry-pi but m…
The I2C pins needs to be configured as i2c to load the FPGA but could then be used as GPIO theroretically . The problem is that with the introduction of device tree in the raspberry kernel, all peripheral are configured at boot and and cannot be rec…
Do you own a logipi v2 or logipi v1 ? On the logipi v2 you have GPIO GEN2 and GPIO GCLK connected to the FPGA (plus i2c, SPI and serial). On the logipi v1 you have all the GPIO connected (form the 26 pin connectors) but you should not used GPIO_GEN5…
My question was : do you need the GPMC to communicate with the design inside the FPGA ? If not then there is no problem, you can use the eMMC and use SPI to transfer data to/from the FPGA.
If you plan is to have the am3359 + NOR + FPGA, there is no…
This is something very unsual that you want to do so i don't have a direct answer ... I guess that you could probably boot from the eMMC then load the FPGA and disable the eMMC before configuring the GPMC. You should have a look at the BBb schematic…
Yes this should be possible because this how things are handlheld by the Kernel when the dvice tree configuration disable eMMC. On first version (without device tree) the eMMC was put in the reset state directly by the u-Boot bootloader with the lin…
Sorry but i'am notre sûre to understand. If you boot the BBB through JTAG and have your uc programming and to configure the FPGA, how is the eMMC involved ? If you don't use the GPMC bus in your FPGA design, there is no risk to interfer with the eMM…
JUst for your information. The base project for the logi-bone was generated using Skeleton, the online architecture editor :
http://valentfx.com/skeleton/arch_editor.html?board=logibone
Hi,
the goal of this project was to get a matrix driver component that is compatible with the wishbone architecture and can be used both on LOGI-Bone and LOGI-Pi. The connections are exactly the same as in Glen's project.
1) There is no need to ma…
If the BBB is booting from the eMMC this can cause a conflict on the GPMC pins that will prevent the BBB from booting. If you boot from an SD card there is no problem at all. This boot problem comes from the fact that the LOGI-Bone eeprom declares t…
I2C and SPI are enough to configure the FPGA. The eeprom is used by device tree when booting linux, so no need to do anything for it. Basically your bare-metal program should only initialize i2c and spi and the apply the FPGA configuration flow.
When the INIT pin of the FPGA is configured as an input (FPGA side) it appears high because its pulled-up and can be read by the Master (the Bone in our case) if configured as an input on the master side.
You are rightthe configuration mode is selected through mode1 and mode0.By default mode0 is pulled to high on the board and mode1 is pulled to low to load from flash by default. Putting mode1 high will configure mode0, mode1 at '11' which is the th…
If you pack the bitstream in your code, then it should be fine. Here is the configuration flow :
1) Set expander GPIO directions (prog pin, mode1 and mux_oen pin as outputs others as inputs)
2) Set mode1, prog to high, mux_oen to low and wait some …
Moreover i have code to configure the GPMC (for fpga/BBB communication) that should work with starterware. Before device-tree was introduced, i was cconfigurinf teh GPMC at the register level.