socjcare
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I have just ordered an ov7670, but I will let you know the results of my test.
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Any update on when you could provide instructions on making it work for the ov7725?
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I started comparing the datasheets for the ov7670 vs ov7725 for pin reset. Is this the different way that you are referring to? in ov7670 RESET = 0 - Normal mode 1 - Reset mode in ov7725 RSTB - system rese…
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I found out that in XPS, the default option to use in startup clock is JTAGCLK. Since I am not using the JTAG cable, I changed this to Cclk, and now when I load the bit file using logi_loader, the DONE pin goes HIGH. The bitgen options are in file b…
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OK, thanks very much for the help. I will try to find out how to check the XPS synthesize options are to set the DONE pin high.
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I am trying to toggle the output at PMOD1<0> at a constant rate. I connected an LED in series with a 470 ohm resistor to ground to this pin to see if it is working. I don't have a scope so this is sort of crude way, but I have used this se…
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The pins that I am using in the FPGA are all 8 of the PMOD1, PMOD2<0> and the pushbutton PB1. Attached is the zip file of the xps project so you can inspect. I hope that the issue is something trivial. Thanks for looking into this.
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I am using Xilinx Platform studio (XPS v14.5) to generate the bitstream but don't know how to set the DONE pin using XPS. I think the snapshot above is how to set it using ISE. I don't have a JTAG cable, but I am thinking about buying one if …
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Ok, thanks for the information and the guide