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Microblaze on the logi-bone

socjcaresocjcare
in LOGI Troubleshooting Discussion
I am trying to run a Microblaze example  on the Logi-bone (version R1.5).  I think I followed the instructions correctly to generate the download.bit that will be used to program the Logi-bone. The Microblaze example that I intend to run   turns ON and OFF an Led  regularly. When I load the download.bit file   using logi-loader, I get the usual message below

ubuntu@arm:~/logi-apps/blink_led_app$ sudo logi_loader download.bit
Compiled for LOGI-BONE
Board variant is LOGIBONE_R1.5
bit file size : 340695
bitstream loaded, check done led

but the done LED remained off and the Logi-bone does not seem to work as I expected it to. I loaded a known good bit file   logibone_blink.bit   and I see

ubuntu@arm:~/logi-apps/blink_led_app$ sudo logi_loader logibone_blink.bit
Compiled for LOGI-BONE
Board variant is LOGIBONE_R1.5
bit file size : 340703
bitstream loaded, check done led

the done LED turned On and it works as expected. 

It is here that I noticed that the bit file size of the download.bit of my Microblaze example  is 340695 vs 340703 for the known good example. After repeating the rebuild of the download.bit file to make sure that I was doing it right, I did a google search and found that bitstream file sizes may vary for the  Spartan 6 and here is the link http://www.xilinx.com/support/answers/47966.html.

My question: What triggers the done Led to turn ON after running logi_loader? Is there something in logi_loader that might prevent loading bit files of different size successfully? I checked the code of the unified_loader on github but I could not figure out if the bit file size or something else might cause the issue.

Thanks in advance for any help.




Comments

  • mjonesmjones
    edited November 2015
    Hi @socjcare

    There is a setting under "Generate Programmging file" that allows you to set the done pin state once the bitstream is loaded.  If set to "float" the LED would night be visible at all.  See image.

    If you have a jtag adapter you can use impact to directly load the bitfile and see if there are any different results.

    Can you send you attach the bitfile or send it to support@valentfx.com .  I can test the bitfile on my side?  


    led done pin.jpg
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  • socjcaresocjcare
    I am using Xilinx Platform studio (XPS v14.5) to generate the bitstream  but don't know how to set the DONE pin using  XPS.   I think the snapshot above is how to set it using ISE.

    I don't have a JTAG cable, but I am  thinking about buying one if there is no other way around this.

    I am attaching the bit file that I am trying to load to the Logi-bone. I would appreciate if  you can test the bitfile and confirm if it is working or not, that would be a big help to me. Maybe the bit file is loading properly, but I am assuming otherwise because the DONE pin does not Light up.

    By the way,  here's the the last few lines of output after generating the bit file, so at least there are no errors.


    Initializing Memory...
    Running Data2Mem with the following command:
    data2mem -bm "implementation/system_bd" -p xc6slx9tqg144-3 -bt
    "implementation/system.bit"  -bd "test/Release/test.elf" tag microblaze_0  -o b
    implementation/download.bit
    Memory Initialization completed successfully.

    Done!


    bit
    bit
    download.bit
    333K
  • mjonesmjones
    edited November 2015
    I tried loading with the logi-loader and had the same result as you.

    I was able to successfully load the bitfile with a jtag loader using impact, so there may be something that conflicts with the SPI pins or perhaps there is an issue with the loader.  Are you accessing the flash pins from the FPGA?

    I would recommend getting digilent hs2 programmer as it will be compatible with debugging through xps (I believe).  It is compatible with impact and vivado as well.  
  • mjonesmjones
    @socjcare  Can you provide you zipped xps project that we can inspect?
  • socjcaresocjcare
    The pins that I am using in the FPGA are all 8 of the PMOD1, PMOD2<0> and the pushbutton PB1. Attached is the zip file of the xps project so you can inspect.

    I hope that the issue is something trivial. Thanks for looking into this.


    zip
    zip
    miicroblaze.zip
    7M
  • jpiatjpiat
    I checked your XPS project an see nothing wrong.

    How do you know that nothing work ? What program is loaded into the micro-blaze (blinking an IO ?) ? I am not sure but in the end it could be the DONE pin not going high after configuration, but the FPGA could be loaded with the design.
  • socjcaresocjcare
    I am trying to toggle  the output at PMOD1<0> at a constant rate. I connected an LED in series with a 470 ohm  resistor to ground  to this pin to see if it is working. I don't have a scope so this is sort of crude way, but I have  used this setup before. I modified the  blink-led program to toggle this same pin at a slow rate and I see that it is toggling at the desired rate.

    Like you said,  the software could have been loaded in the FPGA successfully,but the DONE led does not turn ON afterwards. There might be something wrong with my program so I will now  re-examine my  code. I used an example code for testing the IO, and some parameters might not be correct.

    I also did some search regarding the DONE pin  here I get the impression that the DONE pin should turn ON if the physical loading of data is successful.  I just ordered a JTAG cable, so I don't have to deal with this issue for  now. I will let you know when the JTAG cable arrives.
  • jpiatjpiat
    You should not have to deal with this issue as the loader should get the job done ... The DONE pin should go high unless you tell the synthesize otherwise. I have no clue of what the XPS ynthesizing options are so i cannot conclude on what should be the state of DONE.
  • socjcaresocjcare
    OK, thanks very much  for the help. I will try to find out how to check the XPS synthesize options are  to set the DONE pin high.
  • socjcaresocjcare
    I found out that in XPS, the default option to use in startup clock is JTAGCLK. Since I am not using the JTAG cable, I changed this to Cclk, and now when I load the bit file using logi_loader, the DONE pin goes HIGH. The bitgen options are in file bitgen.ut.  I have attached a picture showing where to change the options, from  -g StartupClk:JTAGCLK to -g StartupClk:Cclk.

    I couldn't find an option regarding the DONE pin, but it  is working now so I don't need to worry about it.




    StartupClk in XPS.JPG
    1030 x 688 - 64K
  • jpiatjpiat
    Thanks a lot ! We will put this somewhere on the wiki, its a very valuable informations for our users.
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