Hi,
Actually I did not know regarding SPI Flash configuration of xilinx earlier and so I was confused. But now I know and I have used it and so things are clear.
Thanks for the reply.
Regards.
Thanks mjones.
I would try eMMC lines directly as GPMC and drive a custom NOR CAPE. May be once i get through I will close this thread as answered.
Thanks for all the help.
Hi mjones,
You can consider me very naive in this area but doing what you suggest gives we shocks as I perceive it in this way:-
1) Booting from GPMC NOR Flash
2) Switching to eMMC and resetting it
3) Again going to GPMC mode as my application cod…
Just check this line:-
BEFORE the SW reinitializes the pins, it MUST put the eMMC in reset.
This is done by taking eMMC_RSTn (GPIO1_20) LOW after the eMMC has been
put into a mode to
enable the reset line.
eMMC during power on is not in a mode t…
Hi Jonathan,
I tried to use eMMC lines going from uC as GPIO and toggled them. I found that everythng was fine. Except that when I toggled MMC1_CLK or MMC1_CMD, I found that MMC1_DAT0 started toggling between 3.3V and 2.5V and it also remained to 2…
These lines of SRM of BBB of scetion 8.1.2 bother me:-
BEFORE the SW reinitializes the pins, it MUST put the eMMC in reset. This is done by taking eMMC_RSTn (GPIO1_20) LOW after the eMMC has been put into a mode to
enable the reset line. This pin d…
Right... The place where I am still doubtful is that if I try and boot BBB with my NOR Flash using GPMC controller, can it still conflict with eMMC functionally or electrically? Whether resetting eMMC is a must when using the shared lines as GPMC bu…
SPI is fine for loading to FPGA. I do not want GPMC to load on FPGA but I want to boot my device using GPMC for a custom hardware that I want to design..
Hi johnathan,
The custom hardware that I want to design requires to boot from a NOR Flash using GPMC interface which will also hold the config files for a xilinx FPGA.
Now to emulate this exercise I have chosen BBB, Logi Bone V2 and a custom NOR C…
Yes, this is what I wanted to make sure as to whether if still FPGA side had some issues.
Again Jonathan, just to continue, what if I want to boot BBB using GPMC interface with a third card which has a NOR Flash and that NOR Flash holds the configu…
The reason I ask this:-
Again can i pull down CFG_FLSH_RST permanently so that FLASH is bypassed here?
Is that I do not know as to what will happen between FLASH and FPGA in the time when I will be configuring the I2C Expander through BBB. Will t…
Hi jonathan,
In your previous post you have said regarding mux_oen pin. I do not find any such pin on the expander of I2C to GPIO. Which one is that you mean here?
Again can i pull down CFG_FLSH_RST permanently so that FLASH is bypassed here?
Reg…
Hi Jpiat,
How are you? What if I keep the BOOT switch on permanently on the BBB so that I can boot my uC through JTAG directly and configure the FPGA on LB-2. In that case do I need to worry regarding the eMMC lines conflict with LB-2.
Please tell…
Hi Jonathan, One more query in this thread for your kind attention:-
If I do not boot from BBB eMMC and do this programming using starterware through JTAG interface:-
Then will setting the SPI1 interface for transfer of data and I2C1 interface for…
I think I am confusing my question on INIT. I think you are telling input w.r.t to Expander IC I/O Port / uC port. But I am telling w.r.t. to the FPGA given in conceptual explanation given in UG380.pdf of Xilinx Slave Serial Configuration. There it …
Hi Jonathan,
Thanks for the response. Can you tell me as to what do you mean by mode 1. I think the mode should be set to 3 for slave serial isn't it?
Again another confusion, I have as to INIT is first described as input and then as output bu th…
Hi Jpiat,
Thanks for the reply. I am clear regarding the hardware but how to go about the program written in logi-tools is not very clear to me as I am not used to of linux but I can try [A brief document regarding the flow of the code would have b…