Sorry, missed your link to the blog post, now I get it!
However I had a look at the testbench for the down_scaler and the virtual camera. It seems like the v-cam waits 25-3=22 t_lines instead of 17 t_lines (as told by the camera datasheet) between…
This process generates a blinking LED. My VHDL is a bit rusty so maybe I'm doing something wrong?
If I want to generate my own pixels (and ignore the camera input) should I have a delay of 17 t_line-19 t_p (where t_p is one cycle and not 2) b…
Hey!
It's just that I did a simple implementation where I count the edges of the pixel clock between the syncs and it doesn't seem to follow the protocol from the camera. So I guess it has been slightly changed in the modules?