Wishbone Python side question

LittleFrog1959

Hi,

First post... Newbie alert!

I am trying to understand how to customise the Wishbone interface to enable me to develop my own application.  Having never worked with FPGA's before, this is a long term project.

I loaded the apps using;

git clone -b logipi https://github.com/fpga-logi/logi-apps

I've been running the Wishbone LED dimmer project from the "apps" directory and then playing with the python while looking the SPI signals on a scope.  I think I've got the hang of it BASICALLY.  Trying to understand the C that drives the SPI port, I can see that there's some bit shifting and OR-ing going on to set things like read/write.

Turning to the python (I hope I've not corrupted it with my messing), I have a line like this;

        logiWrite(0x000B, ((val & 0x00FF), (val >> 7)))  #has to format the 16 bit value into 2 bytes

The bit shift right....  Should that be 8 not 7?  Isn't this designed to put the high byte in the low byte?  Or is this something to do with formatting the 16 bit value so that the VHDL on the other side re-assembles the value correctly?

Thanks for your attention.

Dave