Great Job! SDB?

Hi,

I've been working on a platform called Nysa for the past 4 years. It is similar to ValentFX's FPGA integration solution. I've always worked by myself on the project so it has been slow going. I think we are both reaching for similar goals. Your team's work is very cool! I supported your Kickstarter!

I think the web based FPGA image designer (Logi-Skeleton) is awesome! I designed an application with similar functionality but in PyQt4, It's great but I wish I had chosen a web based application for designing the entire FPGA image.

Has ValentFX considered implementing the Self Describing Bus. It was created by a team at CERN: SDB is a standard for describing the internal structure of the FPGA. It is implemented as a ROM core that your skeleton tool would generate when creating an FPGA image that is read by the interfacing software to determine the functionality of the FPGA. The user interfacing with the FPGA needs no prior knowledge in order to use it.

As an example I forgot what is on the FPGA attached to my computer and I just have to read the SDB to find out what is on there. Here is what happens when I read the SDB of the FPGA attached to my computer:

SDB 
Bus: top        @ 0x0000000000000000 : Size: 0x200000000
Number of components: 2
Bus: peripheral @ 0x0000000000000000 : Size: 0x06000000
Number of components: 6
SDB                  Type (Major:Minor) (01:00): SDB       
Address:        0x0000000000000000-0x0000000000000440 : Size: 0x00000440
Vendor:Product: 8000000000000000:00000000

artemis_usb2         Type (Major:Minor) (22:03): Platform  
Address:        0x0000000001000000-0x0000000001000004 : Size: 0x00000004
Vendor:Product: 800000000000C594:00000000

gpio1                Type (Major:Minor) (02:01): GPIO      
Address:        0x0000000002000000-0x0000000002000008 : Size: 0x00000008
Vendor:Product: 800000000000C594:00000002

sata                 Type (Major:Minor) (14:01): Storage Manager
Address:        0x0000000003000000-0x0000000003001000 : Size: 0x00001000
Vendor:Product: 800000000000C594:00000010

dma                  Type (Major:Minor) (13:01): DMA       
Address:        0x0000000004000000-0x0000000004000095 : Size: 0x00000095
Vendor:Product: 800000000000C594:0000C594

artemis              Type (Major:Minor) (22:02): Platform  
Address:        0x0000000005000000-0x0000000005000003 : Size: 0x00000003
Vendor:Product: 800000000000C594:00000000

Bus: memory     @ 0x0000000100000000 : Size: 0x08000000
Number of components: 1
ddr3_mem             Type (Major:Minor) (06:03): Memory    
Address:        0x0000000000000000-0x0000000008000000 : Size: 0x08000000
Vendor:Product: 800000000000C594:00000000


I added it to Nysa and it has simplified all interactions with the FPGA. I hope ValentFX does because it would allow both of our software to inter-operate one day. If you do end up implementing SDB I hope that we can work together to define standardized device numbers (GPIO's major number = 0x02, SDB major number 0x01, etc...)

Keep up the great work,

Dave



Comments

  • Including SDB in skeleton would greatly improve the user experience. People working with skeleton usually struggle with setting the address peripheral right. You mention a Python based tool of you own, do you have anything to do with http://www.armadeus.com/wiki/index.php?title=Peripherals_On_Demand ? Let me know if you want to contribute to skeleton.
  • Wow that Armadeus tool is really nice. It seems like there are a few groups converging onto tools that simplify the FPGA build/use process. Here is the stuff I've been working on: Nysa Docs

    The SDB python tool I wrote will both generate and parse SDB ROM Data to/from Python structures. That would be cool to work with your team's skeleton. I made some effort in creating an SDB tool that is completely decoupled from the rest of the Nysa tools with the hope that it would encourage groups to use SDB. I'll start reviewing your team's skeleton.

    I think it would be a good idea if I write a pure python version of the SDB generating/parsing with an abstract interface so that if anyone wants to adapt it to their platform it would be as simple as subclassing a generic parser/generator while the backend SDB tool does all the heavy lifting.
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