which JTAG cable and why?

peepo

is each sufficient, and why pay more?

ie beyond high speed ffc which is not for LogiPi or LogiBone

here are 3 options on price in UK pounds

£43   DIGILENT  JTAG-HS2
http://uk.farnell.com/digilent/jtag-hs2/prog-cable-jtag-for-xilinx-fpga/dp/2211775

£108 DIGILENT  6003-410-011
http://uk.farnell.com/digilent/6003-410-011/programming-cable-xup-usb/dp/2061853?ost=6003-410-011

£219 XILINX  HW-USB-II-G
http://uk.farnell.com/xilinx/hw-usb-ii-g/platform-cable-configuration-prog/dp/1649384?ost=HW-USB-II-G

mjones

Hi @peepo

Very good question.  I have the Xilinx USB II cable, Digilent HS2.  

I have found that the HS2 is actually more reliable than the Xilinx USB II for general programming of FPGA and flash.  I don't use chipscope or EDK, but HS2 is supposed to work on those the same way that Xilinx USB II works.

I think that the reason that the Digilent 6003-410-011 is more expensive is that it is a legacy programmer that existed before the HS* based programmers came along and for some reason is still carried, maybe just a large surplus of stock. 

So, in short I dont' think you can go wrong with the HS2.  Though all will work with the LOGI boards.  Note that the HS3 is now available which looks to be designed to target Zynq types header applications and would likely also support the standard 6 pin digilent header.  

johnbeetem

If you prefer to write your own JTAG software (as I do), the US$15 Adafruit FT232H Breakout Board is an excellent high-speed USB JTAG interface.  It provides enough +5V current to power a LOGI-Pi or LOGI-Bone.

peepo

John,

it would be great to see a write up, found this:
https://github.com/daveyliam/spartan6_programmer

is it that simple?

thanks!

johnbeetem

Downloading an image via JTAG is pretty simple once you know how to do it.  Figuring out how to use Xilnix-specific JTAG instructions like JPROGRAM and JSTART is a pain, and a good loader should monitor INIT and DONE to make sure the chip is configuring properly.  But other than these details, it's mostly just writing the bitstream with the CFG_IN instruction.

I don't know of a good write-up, but there are plenty of open-source programmers out there.  Besides daveyliam's programmer (I don't have experience with it) there's Gadget Factory's Papilio Loader.  Papilio boards use FT2232D or H, which work the same as FT232H though they do have a different USB product ID (0x6010 versus 0x6014).

I have my own JTAG code as part of my software for Flavia: the Free Logic Array.  My JTAG source code is in file "jtag.gal" and is written in the GalaxC programming language.  The function "configure Spartan3E" works for both Spartan-3E and Spartan-6.

mjones

Thanks for you insights John.  Nice work on your own JTAG loader!  How fast were you able to get it to run?  Were you using the FTDI->JTAG interface using the FTDI MPSSE?

I believe the papilio loader is a wrapper that is upon the xc3sprog loader project source and is likely a bit more feature rich than the https://github.com/daveyliam/spartan6_programmer.  

johnbeetem

Michael,

It runs quite fast.  I can download a LOGI-Pi or LOGI-Bone in a few tenths of second on a reasonably fast x86 PC.  I'm using the FTDI MPSSE for JTAG.  It's very efficient, particularly for long data transfers.  Much better than bit-banging :-)

peepo

okay, I'm a cheapskate and bought ~$15 FTDI  UM232H-B-NC  USB MODULE, 1 CH, 3.3V, FT232H
http://uk.farnell.com/webapp/wcs/stores/servlet/ProductDisplay?partNumber=2419930

xc3sprog loads blink.bit in under a second, but when I try to load into pram/flash I get error using:
NET "MISO" LOC = P65;

NET "MOSI" LOC = P64;

NET "DRCK1" LOC = P70;

NET "CSB" LOC = P38;

full write up:
https://sourceforge.net/p/xc3sprog/support-requests/4/

it seems I need to update progalgspiflash.cpp

int ProgAlgSPIFlash::spi_flashinfo_m25p(unsigned char *buf)

but what value is pages and sector size?

Mike or anyone have any hints?

peepo

https://github.com/GadgetFactory/Papilio-Loader/blob/master/xc3sprog/trunk/progalgspiflash.cpp

peepo

see xc3sprog support request for my attempt to enable Micron M25PE16

not yet working

~:"

mjones

Hi Peepo.  Sorry I'm not going to be much help here as I have not used the xc3sprog.  Maybe @jpiat or @johnbeetem or @Hamster has some experience with it?

One to note is that the flash change from 

R0-R1.1 boards = M25PE16 (16Mbit flash)

R1.5. and alter boards S25FL032P0XMFI011 (32Mbit flash).

peepo

Author xc3sprog suggests "FPGA boot mode is not right" what might this mean?

I've added the verify output to my support request, but cannot see anything odd.

mjones

If you are trying to boot from flash you must set the "mode" pins according to self configure mode.  There are solder jumpers on the backside of the board which you can use to set to "self configure".  The default mode is slave configure for the R1.1 and earlier boards.  See the notes in on the Power and configuration sheet for proper setting for self or slave configuration.  Here is a screen shot:

peepo

I'm only a very little wiser....

on the LPi 1.2 boards do I need to bridge M0/JP6 or M1/JP7 for "self configure" mode?
ie 1:1 seems to be both open, but which is 0:1?

on the LPi 1.5.1 board "self configure" seems to be default,
so should JTAG-flashing work out of the box?

I'm not clear why would one want slave mode?
ie this seems to imply "self configure" allows both uploading to fpga and to flash
is there a simple online introduction? or perhaps we need one on the wiki?

mjones

The listed pins are in binary order.  [M1:M0].  

Where 01 is the M1:M0 needed for self config.

Therefore to setup Lpi R1.1.x for self config:

M1 =  0 and M0 = 1.  Based upon the schematics for Lpi 1.1 M1 and M2 are pulled up to 3.3V by default (=1). So you will need to solder Jumper JP6 to pull M1 to gnd (=0)

Yes R1.5.x  and later are configured for self config by default, in case the user wants to self configure without having the Pi connected.

Slave mode = configure the FPGA from the Rpi, which is what most users will want to do using the logi_loader.  It is not common to user the same static bitfile that user stores in flash (self config mode).

UG380 has full explanation of the configuration options:

http://www.xilinx.com/support/documentation/user_guides/ug380.pdf

johnbeetem

@peepo: If you do manage to get a self-configure image into SPI Flash, be sure you generate the bitstream with Startup Clock set to CCLK.  JTAG required you to set it to the JTAG TCK.  Slave configuration from the base board requires CCLK as well -- it's the default IIRC.

peepo

Many many thanks Mike & John,

after bridging JP6 and plugging  UM232H-B-NC usb in,
blinking LEDs...

~:"

I guessed JP6 but could not find a clear and definite identity.