I recently decided to get into VHDL programming with the LOGI-Pi. When following the links to download the ISE WebPACK, it now downloads the new Vivado software. However, this uses a new constraint file type, a .xdc, which is like an SDC but with some improvements. I have been unable to implement the project, due to the constraint file not accepting what should be proper syntax. I am a brand new HDL developer, with only experience in high level languages. I understand the VHDL side fine, but the constraints are confusing. Here is my code:
set_property IOSTANDARD LVTTL [get_ports LED<0>];
set_property IOSTANDARD LVTTL [get_ports LED<1>];
set_property IOSTANDARD LVTTL [get_ports PB<0>];
set_property IOSTANDARD LVTTL [get_ports PB<1>];
set_property LOC P105 [get_ports LED<0>];
set_property LOC P104 [get_ports LED<1>];
set_property LOC P102 [get_ports PB<0>];
set_property LOC P102 [get_ports PB<1>];
And my VHDL File:
# ANDGATE.vhd
entity ANDGATE is
Port ( LED : out STD_LOGIC_VECTOR (1 downto 0);
PB : in STD_LOGIC_VECTOR (1 downto 0));
end ANDGATE;
architecture Behavioral of ANDGATE is
begin
LED(0) <= PB(1) AND PB(0);
LED(1) <= PB(1) NAND PB(0);
end Behavioral;
I simply want to make a test file, but have had no success so far. The error I get is:
'set_property' expects at least one object.
Any help with this problem would be appreciated.
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