LOGI Pi User Manual
The LOGI Pi is the first FPGA development platform that has been optimized for use with the Raspberry Pi. The LOGI Pi adds FPGA flexibility and capability that allows the Raspberry Pi to be easily morphed into endless digital applications. The FPGA/CPU combination the LOGI Pi creates an incredibly powerful and versatile digital canvas for users to create their imaginative digital designs.
- FPGA: Spartan 6 LX9 – TQFP144 Package - XC6SLX9-2TQG144C
- Plug and play interfacing the Raspberry Pi
- Arduino Shield expansion allowing for more than 200 existing plug in hardware modules
- Pmod compatible headers allowing for more than 50 existing low cost hardware modules
- 4 layer optimized design to support maximum performance of high bandwidth applications
- Length tuned GPMC, SDRAM and LVDS signals for high performance applications
- 50 Mhz MEMS oscillator
- 2x Push buttons
- 2x DIP Switch
- 1x High bandwidth SATA connector expansion port
- 44 FPGA IO available through Pmod and Arduino headers
- 2x Digilent Inc. Pmod ports supporting 59+ plug and play hardware modules
- 1x Arduino Header supporting 200+ Arduino Shield modules
- Optional I2C, SPI access from the Raspberry Pi
- 10x length matched LVDS pairs routed as: 100 ohm differential, 50 ohm single-ended
- 256 Mb SDRAM
|External Vin Connector|
|Voltage Max.||Voltage Min.|
The LOGI Pi can be powered through the Raspberry Pi connector or from the on-board external power connector. If powering the LOGI Pi from the Raspberry Pi connector, it is recommended that a 1A external power supply be used to power the Raspberry Pi. Most FPGA applications will not require the use of a separate external power supply to power the LOGI Pi, but it is up to to ensure that the FPGA applications will not over-load the Raspberry Pi power rails which will cause brown-outs and or system failures.
All current LOGI applications can be run while being powered only from the Raspberry Pi connector. The user should test newly designed applications to ensure the FPGA load falls within acceptable values. Information relevant to the Raspberry Pi system power requirements can be found the Raspberry Pi wiki.
The LOGI Pi uses LDO regulators to supply 3V3 and 1V2 to the onboard peripherals and the FPGA in order to reduce costs. The power distribution was designed to allow maximum dissipated heat to the internal and external power planes. If very high demand applications are designed testing should be done to ensure that the LDO regulators are not overheated due to the heavy loads. All current applications have been tested including the heavy load of the bitcoin mining applications and no over-heating issues have been found.
Peripherals and Interfacing
The LOGI Pi was designed to allow for easy expansion to a maximum number of off-the-shelf hardware modules. The LOGI Pi uses Digilent Inc. Pmod expansion ports and an Arduino Shield expansion port that give users a plug-and-play experience with over 250 off-the-shelf hardware modules. A SATA port was added to board to be used for maximum bandwidth applications. There are 10 LVDS pairs routed on the board that are all length matched. These interfaces will allow for a multitude of varying applications to be implemented on the LOGI Pi. Due to the high amount of flexibility of the board, some pin functions are shared between different peripherals. This section will cover the details of the peripherals and how to use to while eliminating any pin conflicts.
Top Level Block Diagram
R1 Raspberry Pi Connector Interface Pmod Expansion Port
There are 4 x Digilent Inc. Pmod ports populated on the LOGI Pi. The Pmod ports allow for a wide array of COTS modules to easily be interfaced with the LOGI Pi. A listing of all currently available Digilent Inc. Pmod modules can be found on their site. More 3rd party Pmod modules can be found by searching on google.
Arduino Expansion Port
An Arduino header is used to expand the on-board capability of the LOGI Pi with more than 200 COTS arduino shields currently on the market. The LOGI Pi arduino header supports UNO, DUEM and DUE Arduino headers.
The Arduino header can optionally be accessed directly by the Raspberry Pi either by direct shared connections or indirectly through the FPGA. This allows for direct use of the Raspberry Pi's SPI, I2C, UART hardware to directly talk to the Arduino shields. Alternatively the shields can be accessed directly by the FPGA which can then be accessed by the Raspberry Pi.
A listing of available Arduino shields can be found on the Arduino shield list site.
LVDS Expansion Port
A high bandwidth interface was designed onto the LOGI Pi using a SATA connector. SATA connectors are very low cost and SATA cables are readily available and cheap. The SATA connector allows for a low cost impedance controlled connection to externally designed modules that are designed using a SATA connector. The LOGI Team anticipates designing high bandwidth modules such as LVDS camera, LVDS ADC, etc.
Two differential pairs are routed to the SATA connector. The differential pairs are routed as 100 ohm differential and 50 ohm single ended pairs. The differential pairs are matched in length to within .015" length from each other.
LVDS signal usage
Additional LVDS differential pairs were routed on the board to allow for experimentation and work with further multi-channel LVDS applications that require more than is available with the SATA connector. Eight additional differential pairs were routed to Pmod3 and Pmod4 connectors on the board. The differential pairs are routed as 100 ohm differential and 50 ohm single ended pairs. The differential pairs are matched in length to within .015" length from each other. These additional differential pairs were also routed to match the length of the SATA differential pairs so that they could be used in the same applications as needed.
The Pmod connectors are not optimized for use in LVDS application based on the differential signal length the is created by the connectors being 90 degree angles. The upper and lower rows on the Pmod connector do NOT match in length and if the Pmod connector is to be used this differential length in path should be taken into account.
The Pmod connectors are not optimal for differential signals as they are not capable of maintaining the differential impedance based on the large separation of the signal throughout the length of the connector. It is possible to minimize this mismatch by replacing the Pmod connectors with low profile .100" vertical headers that will shorten the path of separation therefore minimizing the impedance mismatch and allow for higher bandwidth interfaces. For optimal performance using the LVDS signals on Pmod3 and Pmod4 it is recommended that LVDS signals be directly soldered to the header pads to eliminate the impedance mismatch that occurs throughout the connector.
Push Button Usage
Two push button switches are provided on the LOGI Pi. The pushbuttons are configured active high and an discrete 10k ohm pull-up resistor is populated on-board to eliminate the need for configuring and used the on-chip pull-up resistors
DIP Switch Usage
A two position DIP switch is used on the LOGI Pi. It is anticipated that the DIP switch be used for mode control and other general purpose usage.
Two general purpose LED's are used on the LOGI Pi. Due to the limited pin availability on the FPGA TQFP package the LED pins are also shared with two rarely used PWM inputs on the Arduino Shield (RA2.1 only).
A unpopulated JTAG header is available on the LOGI Pi. The JTAG header is contains the Digilent Inc. 6 pin function pinout and is a .100" 6 pin header. The Digilent Inc JTAG adapters or xinlinx flying lead adapters can be used to interface with the FPGA through the JTAG connection. The JTAG connection allows for direct programming FPGA or onboard Flash memory, additionally chipscope can be used for deep debug and analysis.
Linux Images for LOGI
Using the Pre-Configured LOGI Image
You can download a pre-configured LOGI image with all of the drivers needed to get started with communicating between the LOGI Pi and the Raspberry Pi. There are some basic demos that you will be able to run to test the communication and use as a base to begin developing your own applications or downloading the LOGI applications and running them on your LOGI/Raspberry Pi system
The pre-built image is based on Raspbian Wheezy. Raspbian was chosen as it has the widest support and well supported drivers for most applications that LOGI users would need.
What is on the image
logi_loader - fpga bitstream loader to dynamically load bitstreams from the Raspberry Pi
Git repository setup to access pull the latest demos (LOGI-apps) for the Raspberry Pi and the LOGI Pi
Configured with needed software packages and libraries
logi-tools and logi stack to communicate with the host platform
Download the Latest LOGI Image
You can access our preconfigured LOGI image that contains everything you need to get going with the LOGI-boards. The image is based upon Raspbian. You can access all of the latest LOGI images at the following location for download. We recommned using the latest LOGI based upon Raspbian in order to retain maximum compatiblity with the Raspberry Pi foundation
Download Location of the Latest LOGI image
Loading the Image
The image requires a minimum of 4GB SD card be used.
The image can be loaded on an SD card on windows or on a linux system. For windows it is recommended that you use Win32DiskImager and for Linux use USBImageWriter or by using the command line disk utilities.
For a detailed overview of how to load a Linux image onto an SD card see adafruit's comprehensive step by step guide.
Creating your own Raspberry Pi image compatible with LOGI-tools
The following commands were already applied to the pre-configured image that you can download from that page. These commands are only useful when starting from a stock Raspbian image.
Activate spi support in your image
Edit the file /etc/modprobe.d/raspi-blacklist.conf to match the following (you'll need to edit the file as sudo). You'll just need to comment out the spi and i2c related lines.
The commented file should appear as follows:
On next reboot the spi should be available, you should have the /dev/spidev0 symbolic link available. You can also manually load the spi support by issuing the following commands.
Installing the logi_loader tool to load bitstreams to the FPGA
The installation of the loader tools require having gcc, make and git utilities installed on the system. This can be performed using the following commands in raspbian:
Update apt-get packages:
Install gcc, make and git tools
Once these are installed you can directly fetch the source from the git repository and compile. If you don't have access to internet from your raspberry, you can download a zip file from the github repository web page and copy it over to your rapsberry-pi.
Installing logi_loader and enabling SPI and I2C for Raspberry Pi
For Raspberry Pi A/B/B+:
For Raspberry Pi 2 or Pi 3:
For Raspberry Pi 2 or 3 the device-tree needs to get setup so SPI is enabled (disabled by default). To update the loader after the install_logipi script was run, go to logipi_loader and run the following commands:
To enable SPI on latest raspbian distro, edit /boot/config.txt (as sudo) and add: dtparam=spi=on
To enable I2C on latest raspbian distro, edit /boot/config.txt (as sudo )and add : dtparam=i2c_arm=on
Also, edit /etc/modules (as sudo) and add the line: i2c-dev
The logi_loader will be installed in your /usr/bin folder (registered in the PATH of the system and SPI and I2C will be enabled for the Pi-2.
Adding python support for the LOGI Pi
Once the logi-pi is loaded with an architecture containing a wishbone-based system, you can access the wishbone address space through python. To install the python support you need to install the python-dev dependency and run the following commands.
Software and Hardware API from the LOGI Pi to the Raspberry Pi
The LOGI Stack Overview
The key to successfully using an CPU/FPGA co-processing system is allowing them to transparently and efficiently read and write data between the CPU and FPGA. The LOGI stack consists of software, drivers, firmware and HDL that allows users a seamless interface between the FPGA and the host CPU when using the LOGI development boards. A block diagram of the LOGI stack can be seen below.
CPU Side communication
CPUs generally have hardware communication peripherals such as GPMC (BeagleBone), SPI(Raspberry Pi), and other standard parallel and serial interfaces. It is optimal to use these hardware interfaces in conjunction with the CPUs DMA (direct memory access) hardware, if available, to offload CPU usage and transmit data at maximum rates. This is easily possible by using C or lower level languages to configure the CPU registers and then transmit and receive data via the CPU hardware. ValentF(x) has created efficient low level interfacing drivers for the BeagleBone and the Raspberry Pi with easy read and write APIs to receive and transmit data to and from the CPU. Users can use read and write commands to directly access memory mapped registers, memory and user space applications within the FPGA.
For additional ease of use and access to vast and easy to use libraries ValentF(x) implemented the use of Python within the library stack. ValentF(x) has created C to python wrappers and libraries that allows users to develop their CPU/FPGA applications in Python on Linux systems on the Raspberry Pi and the BeagleBone.
Raspberry Pi SPI to FPGA Interface
The Raspberry Pi to FPGA main communication interface is the PI SPI port. The Max stable SPI clock rate that has been tested is 32-48Mhz. Based on our development experience there are some instability issues that can occur when using higher clock rates. By default the current LOGI SPI drivers runs at 48 Mhz With the current 48Mhz clock and direct communication to the FPGA the user can expect to get 4 MB/S throughput between the Raspberry Pi and the FPGA.
FPGA side communication
The wishbone bus architecture is used on the FPGA to allow multiple address mapped peripherals and modules to be accessed from the CPU. Wishbone allows for any number of wishbone peripherals to easily be attached to the system bus and can send and receive data at a rate which is limited by the communication hardware on the CPU. In order to directly communicate from the CPU to the wishbone bus a wishbone wrapper is required that translates the wishbone communication standards to the CPU host communication protocol being used. ValentF(x) currently has stable wrappers implemented that allows efficient communication between the Raspberry Pi and the BeagleBone to the FPGA.
Scalability of the LOGI Stack
The LOGI stack architecture can be used to support any future CPU host/FPGA hardware as the LOGI ecosytem evolves. The wishbone bone bus can be wrapped to support direct communication with future supported CPU hardware as needed.
Experimenting with the LOGI Stack
Users can easily begin experimentation on using the LOGI Stack by running the LOGI-Apps which are installed on the pre-configured LOGI images for the Raspberry Pi and BeagleBone. The LOGI Wishbone project contain the C and Python APIs and a configured FPGA bitstream that demonstrates the usage of read/writes to registers, memory and a PWM LED core on the FPGA.
Using the C library to communicate with LOGI Pi
The logi-tools repository also provides a C library with code to communicate and address peripherals on a wishbone architecture loaded on the logipi. This code can directly be linked with your application code.
Programming the FPGA from the Raspberry Pi
The main method of programming the FPGA is to use the LOGI Loader from the Raspberry Pi. The LOGI Loader is a program that has been developed to automate the process of loading the FPGA. The user needs to download the LOGI Loader from the LOGI github repository and install the loader application on the Raspberry Pi device. Once installed, the LOGI Loader can be invoked from the location of the stored FPGA bit file. The LOGI loader will load the FPGA with the given bitstream file name.
Board Version Changes
LOGI Pi Version 2 (R1.5.1) Change Listing
FCC and CE Compliance
The LOGI Pi design has undergone testing to meet FCC and CE certifications.
An I2C GPIO expander was added to handle FPGA IO control during programming. This Frees up Raspberry Pi GPIO pins for other uses.
Mounting holes to support the Raspberry Pi B+/2 were added. This give support for all Raspberry Pi Board variants including A/B/B+/2.
Micro-USB connector for Power
A Micro-USB connector was added to allow additional power to be supplied to the LOGI board in the case of high powered applications or for use as a standalone board.
Increased Flash size from 16Mbit to 32Mbit
A new SPI flash was used which increases the memory from 16Mbit to a 32Mbit.
SPI Buffer to FPGA and Flash
An IO buffer was added on the Raspberry Pi SPI pins that allow the SPI port to be isolated from the Flash chip pins when not being used for FPGA configuration. The Flash chip can then be directly accessed from the FPGA without conflicting with communication between the Rasperry Pi and the FPGA.