LOGI EDU User Manual
The LOGI EDU package is an expansion board for the LOGI Pi or LOGI Bone FPGA boards. The LOGI EDU serves as an educational pathway to allow FPGA beginners to easily learn and implement basics of FPGAs and HDL design. The educational path walks beginners through the basic steps of FPGA design by using examples from the book “FPGA Prototyping By Verilog Examples” or “FPGA Prototyping By VHDL Examples”. The examples can be run by using the add-on EDU expansion module that supports the book examples and applications. Using these examples allows the user to quickly get up to speed with the basics of FPGA design and allows the user to migrate to working on and designing greater complexity FPGA applications.
1) There are many FPGA resources that do not give all of the information needed, or omit some of the relevant information required to fully understand the basic and advanced topics of developing FPGA designs. The Pong Chu books chosen contain the crucial concepts of FPGA design in a practical and concise way that will get the reader up and running in an efficient manner.
2) The LOGI EDU was designed to be used after you are done with the educational content. We have added some extra peripherals that make it a well rounded board for many types of general purpose projects.
- 4x Seven Segment Character display
- 9 bit VGA video output
- 2x PS/2 peripheral ports
- 2x PWM or delta sigma audio outputs
- 2x NES (Nintendo original) controllers
- 2x Servo connectors
- Breadboard area utilizing 10 shared IO pins for general purpose use
Power From The Host
The LOGI EDU in most cases is intended to be powered from the Raspberry Pi or BeagleBone. The main power source is 3V3 which is sourced through the Pmod connectors.
External Power Header
There is an external power header which can power the PS/2 port or the servo header if higher voltages are needed. Note that the external power header only supplies power to the servos (which is required for the servos to properly function) and to the PS/2 ports.
External Power for the Servo Headers
It is required that the user connect an external power supply to the EXT PWR header in order to supply power to the servo headers. 5V is a recommended voltage to use.
Optional External Power to the PS/2 ports
We have not found any modern PS/2 devices that require an external 5V supply, so it is recommended to not use the external voltage to PS/2 unless required. If supplying 5V to the PS/2 ports, special care should be taken to ensure that the FPGA IO pins are safeguarded for excess voltages. In order to switch the higher external voltage to the PS/2 ports requires that the PS/2 jumper voltage select be switched to 5V.
Top Level Block Diagram
9 Bit VGA Port
A 9 bit VGA port is supplied on the LOGI EDU. The VGA port is an easy to use method of generating video signals in gray scale, black and white or 9 bit color.
The LOGI EDU contains 2 PS/2 ports which would allow the board to interface a keyboard and a mouse to the LOGI board. Additionally the PS/2 protocol is an easy to use and interesting protocol that can be experimented with for educational or practical purposes.
The LOGI EDU contains a 2 channel audio jack with each channel containing a low pass filter. Sigma Delta or PWM methods can be used to output audio from the audio jack. The jack is intended to support retro video game applications using the VGA port or for development or experimentation with delta sigma or PWM analog output algorithms.
The LOGI EDU contains 2 Nintendo entertainment systems (NES) controllers. The NES controllers are very easy to interface with, are easy to find and are very low cost. The NES ports allow for interesting applications such as retro arcade or other user control applications using external NES controllers.
Seven Segment character display
The LOGI EDU contains a 4 x SSEG display module. The Module is wired in a multiplexed control topology to minimize the number of pins required to be used.
The LOGI EDU contains 2 x servo headers which can be used for experimentation and control of external servo motors.
The LOGI EDU contains a breadboard area with a breakout of 10 IO signals which the user can use to wire in custom circuits to be interfaced with the LOGI FPGA.