LOGI - Hamster Cheapscope Logic Analyzer - Project

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Project Overview

By combining the use of the LOGi FPGA with the Raspberry Pi or Beaglebone, the flexibility and available options for functionality are significantly increased.  For instance the Raspberry Pi has built in HDMI video output capability that when used with the LOGi FPGA could be utilized to enable a standard desktop LCD monitor to easily be used as a graphical interface between the user and the FPGA.  Valent F(x) previously showed how the user could add Virtual Hardware components to the LOGi boards by quickly and  easily using pygame, logi wishbone wrapper and python to create a virtual panel of components that has bidirectional communication between the FPGA.  Such a method of adding components enables no cost virtual hardware functionality to the LOGi FPGA user.  Valent F(x) has utilized the same method of using the FPGA in conjunction with the Raspberry Pi and utilizing the graphical components of Raspbian desktop to create a Virtual Logic Analyzer, Cheapscope, that was written by Mike Field.  

Cheapscope Overview and description

For detailed information about the design of Cheapscope logic Analyzer see Mike Field’s detailed wiki explanation about the Cheapscope design.  In short, the cheapscope is a hardware buffering implementation that is constantly monitoring predefined FPGA signals.  The user can set a pre-defined trigger pattern that once detected, writes the buffered signal data to the Raspberry Pi through it’s UART connection.  The Raspberry Pi host software receives the buffered data and creates visual representation of the data directly within a terminal window.  The user then has options to scroll through the channel data, view and interpret the captured channel data.

See the demo video here of cheapscope in action on the LOGi-Pi and the Raspberry Pi. 

Figure: Cheapscope Running on Raspbian Desktop

Figure: Cheapscope running remotely through Putty SSH terminal on windows

Figure: Cheapscope Running on SSH Terminal Window

Functional Overview of Cheapscope Logic Analyser - LOGI App

Cheapscope is a hardware buffering implementation that is constantly monitoring predefined FPGA signals.  The user can set a pre-defined trigger pattern that once detected, writes the buffered signal data to the Raspberry Pi through it’s UART connection.  The Raspberry Pi host software receives the buffered data and creates visual representation of the data directly within a terminal window.  The user then has options to scroll through the channel data, view and interpret the captured channel data.

Running the Cheapscope LOGI-App - Step by Step Guide

Demo Requirements:

getting the logi-apps

The demo resides within the logi-apps.  So the easiest way to run the demo is the download and run the demo using the instructions found on the logi-apps wiki page.  In short you can download all of the logi-apps by running "git clone -b logipi https://github.com/fpga-logi/logi-apps.git " .  You can then navigate to the virtual component demo directory and run "sudo ./make_demo" to load the bit file and display basic instructions for the edu demo.  

Step by Step

You can run cheapcope either on Raspbian desktop or remotely through an SSH terminal.  We prefer to run it remotely.  It is best to use an SSH terminal that supports ANSI codes (Putty) in order to get the full waveform color view and scroll bar .  I generally like to use SSH Secure Shell (no ANSI code support), based on the built in SCP support, but when running cheapscope you will  get a lot more out of it when using Putty.  You can view the above images to see the differences of functionality. 

1) Navigate to the logi-apps/cheapscope app directory

2) Run "sudo ./make_demo.sh" to run the demo script "sudo make_demo.sh".  The first time the script is run it will ensure that the ttyAMA0 uart is disable from use of the system.  This will allow us to communicate between the FPGA and the RPI and allow the stored logic "snapshots" to be viewed within the terminal window.  The script will disable the ttyAMA0 port and restart the Raspberry Pi.  You will need to re-run the make_demo.sh script a second time after the RPi has restarted. 

3) Ensure that the Rpi has re-booted properly (with ttyAMA0 disabled) and re-run the make_demo.sh script "sudo make_demo.sh".  This will load the bitstream to the FPGA and run the cheapscope executable.  

4) The terminal window will clear and a numbered column representing the given channels will appear in the terminal window.  Resize the window to fully display all of the channels in the terminal window as shown in the above example images.  

Description of cheapscope operation

Cheapscope is now running and ready to capture your FPGA internal signal data!  The HDL FPGA project can be found here.  The HDL has an internal buffer that constantly watched the pre-defined internal FPGA signals and buffers these channels waiting for a trigger event to take place.  The LOGI-App demo project is setup to monitor 16 bits of counter signals that is running in the FPGA.   A trigger is setup to take a snapshot of the count signals when Push Button 1 is pushed.  The buffered signal data is then sent to the Raspberry Pi, where it is parsed into a readable ascii format which is then displayed on the terminal output (Hecka Cheap!).  Let's not keep the FPGA waiting, let's trigger it!

5) Press push button1 PB1 (as labeled on the silkscreen outer PB).  This will trigger the FPGA to create it's instantaneous snapshot of the monitored internal signals.  The FPGA now is sending back the data and it will be displayed on the terminal window.  

Note that there are "><" indicators on the capture.  This indicates where the trigger event took place relative to the full captured snapshot.  This gives some history of before and after the snapshot took place.  Sound familiar?  If you have worked with oscilloscopes are logic analyzer it will -  this is just what they were built for and what makes them very powerful tool.  

You can now scroll through the full history of the capture by using the left and right arrow keys on the keyboard.  Cheapscope will continue to take snapshots as long as the trigger event occurs.  If a trigger event occurs while you current have a capture being displayed, a "N" will show up at the bottom of the window indicating that there is new data that can be viewed.  

6) Press PB1 again and note that there is a new capture that is ready to be displayed.  Press "n" on the keyboard to view the "new" captured data.  

You can again scroll  through the complete captured history to view any interesting signal data that might beof interest.  This example is very determinsitic, as it is a counter, so we know what to expect as we scroll through the data.  But, the power of cheapcope come in when we need to analyze very undeterministic signals such is the case when we are trying to debug signals during protocol development.  

So there you have it you can customize the cheapscope project to begin debugging your own ripping HDL projects and go where not scope can ever go.  Have a look at the HDL FPGA project.  You can download and make it fit the needs of your own projects.

Potential upgrades and modifications

There are some potential upgrades that would make Cheapscope a much more dynamically usable tool for different types of uses. 

  •  Front End GUI to configure Cheapscope 
  • Software Side programmable Analyzer triggers 
  • Configurable Baud Rate to decrease TX/RX latency
  • Potential for port to pygame graphics for many feature add-on functions
  • Use SPI/GPMC communication rather than uart to increase throughput/ latency between capture and display 

 Want to get involved? 

Are any of you guys interested in helping us make any of these improvements? We can can only do so much in a given amount of time and would love to have YOUR help! Strength in numbers is what we are talking about! Or maybe more like, Cool functionality much quicker! If you have any interest in getting involved us a holler! 

 We hope to continue to create useful FPGA tools that fully utilize the wide array of existing Raspberry Pi and Beaglebone software and hardware components. We believe that using the graphical functionality of the Pi/Bone is the beginning of many possible case usage scenarios for the FPGA. What kind of possible case scenarios do you see available? What would you like to us to implement? Let’s create some Cool Stuff! 

Manually building and running Cheapscope on the Raspberry Pi

Install libncurses:

sudo apt-get install libncurses5-dev

Build cheapscope:     

gcc -o cheapscope cheapscope.c -lncurses

Ensure that rpi ttyAMA0 is not being used by system (used by default).  The easiest way to enable/disable and veiw the status of the ttyAMA0 serial port is to use the "rpi-serial-console" utility.   Below are instructions for running the utility to disable the serial port so that the cheapscope will have access to it. 

Easy utility to all user access to serial port

Install using the follwoing command

sudo wget https://raw.github.com/lurch/rpi-serial-console/master/rpi-serial-console -O /usr/bin/rpi-serial-console && sudo chmod +x /usr/bin/rpi-serial-console

Or if you already have the utility downloaded use the following command:

cp rpi-serial-console /usr/bin/rpi-serial-console && sudo chmod +x /usr/bin/rpi-serial-console

 Check the status:    

 sudo rpi-serial-console status

If enabled user must disable the ttyama0 port(make available for user access):

sudo rpi-serial-console disable

reboot the Raspberry Pi

sudo shutdown -r now

Run the cheapscope:     

sudo ./cheapscope /dev/ttyAMA0

Where To Go From Here

Hamster cheapscope full documentation and source code

LOGI cheapscope source code

Cheapscope Video of it runninng and overview

Other LOGI-Apps that you can run with a flick of the keyboard "make_demo.sh"

Other Resources

LOGI Github repositories


LOGI Videos


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