It be a little tricky when using device specific DSP functions. Many times you will be stuck using the vendor specific IP tools that will only work with that specific device and you don't see the underlying source code. If you want to learn the fundamentals of using the DSP can look into the theory as implemented on a DSP processor (simpler to understand - probably). Then look at how it works on the FPGA in the first link below.
Agree, it would get tricky. I was reading up on Xilinx and Altera DSP yesterday. Even though I'm a newbie to FPGA, it was pretty clear the differences between product lines would mean code that works on Spartan DSP wouldn't necessarily work on Altera arria.
The document "xst user guide" from Xilinx shows the writing rules for your HDL to map on DSP slices http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/xst.pdf . These rules are likely to work for other vendors FPGA and since it's the HDL that is mapped to DSP slices, the code will synthesize with most tools. The other way to use DSP slices is to use the IP core wizzard in Xilinx tools, but this will generate Spartan6 sepcific code, and this won't even synthesize on other family or other vendor's FPGA.
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thanks for the links