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LOGI-PI as a B+ HAT module

patfpgapatfpga
in LOGI-Pi Discussion
The raspberry pi organization has created a standard for gpio modules that plug into the B+ board. It would be a good idea to target this standard. With the current hardware two extra connections would need to be made to emulate an I2C eprom that is used to identify the module. Once this is done it will be easy for users to create their own versions.

Here is a link to the spec:
https://github.com/raspberrypi/hats

Comments

  • jpiatjpiat
    Hi,

    we are definitely looking into making future revision of the LOGI-Pi, HAT compatible. This is exactly what beaglebone implemented for their capes.  The current problems with HAT is that there is more than 3M Pi (A and B) in the world that cannot be compatible with the HAT spec. One possibility could be to have the B and A compatible header soldered and have the additional pins to be soldered by the user depending on if he owns a B+, but the HAT spec states that user do not need to solder anything. Another option for B/A owners could also be to cut the pins that would conflicts with the composite video output.

    What do you mean by "Once this is done it will be easy for users to create their own versions." ? From what i understand HAT is a just a way to make boards plug'n play, as it allow to setup pins and drivers automatically.


  • jpiatjpiat
    Just saw that HAT also has a mechanical specification ... There is little chance that we can fit current LOGI-PI components on the 65mmX56.5mm area and add the cutouts for the flex connector.
  • patfpgapatfpga
    The HAT specification allows for identification of different functions. I would expect an FPGA HAT too have many identities based on what functions were implemented in the FPGA.

    It seems that they are less stringent on the physical spec. Plus, your hardware offers a unique HAT experience since it would be so flexible.
  • RibboxRibbox
    the idea of the HAT is the end user has a easy experience of using the board. As the LOGI boards are mainly aimed at developers, it can be expected the user would have the ability to setup the board. I don't have a BBB so I can't say if the device tree on the EEPROM works. What would be good is to have a LOGI-PI board with the 50pin header and the also sell a 40pin to 28 pin convertor board. This would mean that only one version of a LOGI-PI would be required.
  • madscientist_42madscientist_42
    Actually, the boards should be intended for more than just developers.  (Remember the Pi, even the Pi2, is intended to be an educational computer first and foremost.  The fact that at least one or more of the games I've ported over the years are likely prospects for the Pi2 is compelling, as is the ability of the LogiPi working after a fashion with the B+ and Pi2- but...)  As such, I'd think a board that at least had mount-points and a board that played nice with the new design even if it spilled over a little bit to be able to do it would be a win.  I'd buy another just to have that instead of the jerry-rig I've got.  It works nice with the Pi.  It works nice with the BeagleBone Black.  Why can't we have something that works nice with the new designs?  :D
  • mjonesmjones
    Hi There,

    We are currently MFG the latest LOGI-Pi, which will have a few mods to be better suited for B+/2.  There are added mounting holes for B+/2 and the JTAG connector was moved to avoid shorting on the USB connectors.  There are a few other minor changes such as adding an GPIO expander and removing the RPi SPI pins from the flash pins so the FPGA can access while still using SPI to the Pi.  

    We left the 26 pin header as there really was not much added useful functionality added on the extra pins when accessing the FPGA.  Wish the broadcom has a nice parallel interface such as the BBB GPMC.  

    All in all it should be a nice experience for the A/B/B+/2.  

    We are still looking at options for a HAT.  Really don't like how they put a slot right down the near center of the PCB.  It kills a the potential routing of the board and signal integrity for signal having to go around it.  

    Continue to let us know your thoughts on the HAT and how we migh best implement an FPGA solution.

    Cheers.
  • madscientist_42madscientist_42
    Sounds like you've done a few things to make it better in the short term.  Nice.  Thanks for sharing/updating us on that.
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