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Writing bitfile to onboard flash

darkhelmetdarkhelmet
in LOGI-Bone Discussion
How do I push a bitfile to the onboard 16Mb flash?

I am currently using dd to push the file to /dev/logibone, is logi_loader required for a persistent bitfile on the logibone?

Thanks!

Comments

  • mjonesmjones
    edited August 2014
    @darkhelmet

    Good questions.  logi loader is what we recommend using as it is very dynamic in being able to load/reload files from bone user space.  In order to automate FPGA configuration you can setup a bone boot script that automatically calls logi_loader to load a specific boot file on system boot.  Here is a newer debian image for the bone that has the user space logi_loader: https://www.dropbox.com/s/4gmcpigtdpap5br/debian_jessie_24_07_2014.img.zip

    You can directly load a bitfile into flash using the jtag port and xilinx impact tool.  The Flash will be auto recognized and you can load your bitfile.  In order for the FPGA to self boot from flash you will need to set the jumpers on teh backside of the logi-bone for self-config.  

    Alternatively there you could create an FPGA program that could load the Flash from the FPGA after passing it a config file from the bone.  The xula boards have hdl source to do this.  

    Cheers,

    Mike
  • darkhelmetdarkhelmet
    Hi Mike, 

    Thanks, I'll have to take the JTAG approach since we are looking to access the FPGA from u-boot in an almost bare-bones approach.
  • mjonesmjones
    edited August 2014
    @darkhelmet

    Here are some low cost JTAG adapters from digilent inc.  I think that there are some other alternative low cost options available on ebay and elsewhere as well.  

    @jpiat may be able to comment further on any other approaches for loading flash.  

    Cheers.
  • darkhelmetdarkhelmet
    I'm good, we have some Xilinx tools here, the JTAG programming worked very well using Impact as you suggested, I loaded the blink test and now I can push my own bit file to the board and have it load automatically on power up.

    For people reading this post later you need to short the JP3 and JP6 jumpers (on pcb R1.0) to set the FPGA into self-configuration mode and take the flash memory out of reset.

    Thanks Mike!
  • mjonesmjones
    @darkhelmet  Glad to hear it worked well for you.  Just note that the pins connected to the Flash/FPGA are shared with the BBB.  So, in order for the FPGA to self boot, these pins tristate on the bone will need to be set to the appropriate state.  It sounds like by default they are not a problem - great!

    Cheers!
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