The long-sought WSPR image problem has been fixed. You may still occasionally see a signal marked "image" in the WSPR waterfall, but this should be the fault of the WSPR transmitter and not the Kiwi. In any event the WSPR extension will only upload the strongest spot when there are multiple decodes of the same call/grid.
As a consequence of the above the audio sample rate was increased from 9.6 kHz to 12 kHz. And the AM-wide mode passband increased from 8 kHz to 10 kHz.
And as a consequence of that, and for other reasons, a new audio buffering scheme was implemented. Running at 12 kHz requires greater latency buffering in the FPGA. But more importantly the new FAX and timecode decoder extensions (not released yet) showed problems with dropped samples. Nothing detectable by ear, but easily seen on the FAX or timecode displays. The new scheme helps that problem.
And since we were changing the FPGA Verilog code we finally got around to documenting the procedure for setting up the Xilinx Vivado build environment for those of you who want to tinker with changing the FPGA (there have been several requests). The procedure is now greatly simplified, especially dealing with the required Xilinx IP blocks. See the file Beagle_SDR_GPS/verilog/README for complete details.